A memory system usually includes a memory array with a plurality of flash-EEPROM (Electrically Erasable Programmable Read Only Memory) memory cells.
In such a usual memory system it is possible that in a first operation mode the flash EEPROM memory cells are programmed in such a way that only one bit is stored at each of the flash EEPROM memory cells, what means that the memory cell array is working like a cash memory. Later on using background operation of the memory system the stored data will be read again and will be written into with the flash EEPROM memory cells, but this time using a second operating mode for storing a plurality of bits to the respective flash EEPROM memory cells.
With the usual method for storing of a logic state using a ferro-electrical transistor of a storage cell of a memory array there is at least a second ferro-electrical transistor of the memory array controlled in such a way that it is operating in depletion mode.